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Formal Methods in UTRC

Wednesday 5 February 2020, 1.30PM to 2.30pm

Speaker(s): Georgios Giantamidis (United Technologies Research Centre (UTRC), Ireland). Hosted by Simon Foster.

Formal methods workflows can sometimes be challenging to adopt in industrial environments. On the other hand, the need for formalisation and verification in the design of complex systems is now more evident than ever. To the end of easing integration of formal methods in industrial Model Based System Engineering workflows, we have developed a process aiming to render requirements formalisation as painless as possible to the industrial engineer.

The developed workflow is an end-to-end solution, starting with natural language requirements as input and going all the way down to auto-generated monitors in MATLAB / Simulink. We employ Natural Language Processing and Machine Learning techniques for (semi-)automatic pattern extraction from requirements, which drastically reduces the required formalisation workload for both legacy and new requirements. For monitor generation, we provide our own approach which outperforms existing state-of-the-art tools by orders of magnitude in some cases.

In this talk, I will first give a brief overview of the developed workflow, then focus on the technology behind monitor generation, and finally discuss opportunities of applying formal methods in different aspects of the MBSE workflow (eg simulation-based verification, assurance cases, non-functional requirements, etc.).

Location: CSE/082, Department of Computer Science, Campus East, University of York