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Overview of the AURA Hardware (PRESENCE)
The choice of a binary neural network architecture allows very efficient implementations in hardware, and this is a major aspect of the AURA project. The first AURA hardware prototype was implemented on a VME platform and was completed in 1997. This project has been funded by the EPSRC in collaboration with British Aerospace and The Post Office Research Group. It aims to develop hardware and software high performance pattern recognition system for use on text and structural databases. A major part of the project is aimed at building the Cortex-1 neural associative parallel processor. Staff on project: Anthony Moulds, Zygmunt Ulanowski, Aaron Turner, Michael Weeks Past staff on project: Ken Lees, John Kennedy, Julian Young, Amine Bermak, Michael Freeman
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