The descriptions are for modules currently being taught. They should be viewed as an example of the modules we provide. All modules are subject to change for later academic years.

Foundation in Electronics, Signals & Circuits (FESC) 2015/6

Workload - Private Study - Assessment - Description - Aims - Learning Outcomes - Content - Teaching Materials - Recommended Books

Module Code COM00009C
Lecturers Christopher Crispin-Bailey, Mike Freeman
Taken By CS 1, CSESE 1, CSYS 1, MEng CS 1, MEng CSAI 1, MEng CSESE 1, MEng CSYS 1
Number of Credits 20
Teaching Spring 2-10, Summer 1-4
Closed Assessment [80%] Closed Exam Summer 5-7, 3.00 hours
Open Assessment Lab assessment: Tech report [20%]
11th Jan → 20th Apr
Feedback: 18th May
Reassessment [100%] Closed Exam - August Resit Week, 3.00 hours

Module Prerequisites

Prerequisite knowledge

This module contains two strands: Electronic System Design (ESD) and Computer Architectures (CAR)

Prerequisite modules

Workload

  • Lectures: 32 x 1hr
  • Labs: 24 x 2hrs
  • Private Study: 117hrs
  • Assessment: 3 x 1hr

Private Study

40 hours - ESD open assessment. The remainder of the time is to be allocated evenly between ESD and CAR i.e. understanding the lecture material so that you can explain the content in your own words.

Assessment

Closed Assessment

  • Closed Exam Summer 5-7, 3.00 hours

This assessment is divided into two sections: Electronic System Design (ESD) - 67% and Computer Architectures (CAR) - 33%.

Open Assessment

This assessment examines Electronic System Design (ESD). Typically work will be completed in collaboration with a lab partner during timetabled laboratory sessions. Experiential result will then be written up in the form of a joint log book.

Formative Feedback

The lecture material will be heavily supported by relevant laboratory activity which inherently provides formative feedback e.g. designing, implementing and testing circuits to a given specification.

Electronic System Design (ESD) : Students will be given model answers to laboratory exercises each week, these forming the building blocks for the open assessment.

Computer Architectures (CAR) : Students will be given model answers to laboratory exercises each week.

Written group and individual feedback within 4 weeks of closed assessment.

Description

This module takes you from basic electricity, through analogue and digital electronics to computer architectures. Along the way you are introduced to the instruments used in the hardware R&D laboratory, software simulators, and hardware programmers. You will even do some soldering. The module is taught through lectures and supporting laboratory activity and you will be examined in both open and closed examinations. This module prepares you for work in embedded systems and embraces all levels of computer design.

Aims

This module contains two strands

  • Electronic System Design (ESD)
  • Computer Architectures (CAR)
ESD: The aim of this strands is to examine the electronic subsystems that are used in the construction of electronic computers. The material covered is broken down into four main sections
Fundamental Electronics:
  • Voltage, Current, Power
  • Components: Resistors, capacitors, inductors
  • Basic analysis of analogue electronic circuits
Analogue Electronic Circuits:
  • Components: diodes, transistors, operational amplifiers
  • Standard op-amp circuits
  • Power electronics, power supplies.
  • Power dissipation, thermal management of electronic components
Digital Electronic Circuits:
  • Boolean logic, KMAP minimization
  • Flip-flops, synchronous logic design
  • State-machines
Interfacing analogue and digital systems:
  • Signals and noise
  • Digital-to-analogue and Analogue-to-digital converters, quantisation, aliasing, Nyquist sampling theory
CAR: The architecture strand forms an introduction to the structure of computers at the machine instruction and higher architectural levels. The delivery, based around the evolution of an hypothetical processor, considers quantitative and qualitative design evidence, and emphasises engineering choices and the reasoning behind them. The linkage between low-level machine code, and higher level languages is explored, and examples of interpretative and compiled coding styles are considered. A consistent thread in the material is the issue of design trade-offs, such as hardware versus software, complexity versus speed, orthogonality, and so-on.

Learning Outcomes

On completion of the ESD strand of the module, students will be able to:
� Analyse the behaviour of simple analogue electronic circuits.
� Assess the power requirements of electronic systems and design a power supply to meet these needs i.e. voltage, current and thermal management of electronic components.
� Design and implement operational amplifier circuits to pre-process analogue sensor data. Then select the appropriate analogue-to-digital converter to meet a system's input frequency and signal to noise requirements.
� Design and implement digital electronic circuits to both control the acquisition and processing of sensor data. Then select the appropriate digital-to-analogue converter, or output driver circuit to control a system's output actuators.

On completion of the CAR strand of the module, students will be able to:
� Demonstrate familiarity with low-level computer architectures and be able to compare and contrast their advantages and disadvantages.
� Design simple processors using digital electronic circuits, assess their limitations and appreciate various design trade-offs in the machine's design.
� Understand the concept and function of interrupts, I/O programming and how these may be implemented within a computer.
� Write competently in machine code and assembly language at a basic level

Content

ESD: Part I: Basic concepts: voltage, current, power, Ohm's Law, Kirchoff's laws. AC concepts: impedance, frequency response. Simple Transistor circuits: AC small signal models, voltage follower, voltage amplifier. Operational amplifiers: ideal behaviour, op-amp analysis, op-amp applications. The digital-analogue interface: ADCs, DACs, Nyquist sampling theorem, quantisation error. Part II: Electronic system design, building upon the concepts introduced in Part I, focusing on combinational logic, sequential logic and state machine design. These core design skills are applied to the design, implementation and testing of a set of mini-projects e.g. logic probe.

CAR: The unifying thread is a study of the way in which a possible machine design could evolve, that would enable a machine to execute code compiled from a high-level program in a procedural language, with improvements in efficiency and functionality. Register machines are considered, and stack-based architectures are explored, in particular. Run-time stacks: named (frame) and anonymous (expression/data), and program (return). Subroutine calls, parameter passing, recursion. Static efficiency and dynamic efficiency. Processor status registers and priorities. The notion of real-time, I/O programming, interfaces and peripherals. Interrupt schemes. Variables, parameters and run-time storage allocation.

Teaching Materials

Laboratory scripts, exercise sheets and lecture slides are available online.

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Last updated: 19th September 2016