Low-Power Coding for Networks-on-Chip with Virtual Channels

Power consumption represents a major concern for Networks-on-Chip (NoC). In order to provide quality-of-service to such NoCs, Virtual Channels are normally used. A drawback of the approach is the increased power consumption because of the suppression of correlation between consecutive flits. This work proposes a low-power coding approach to overcome the aforementioned problem. The technique requires a minimum overhead, while obtaining a significant power reduction. Exhaustive experimental simulations are provided to demonstrate the advantages of the proposed architecture.