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Dark Silicon - When Moore's Law gets too hot to handle
Dr Chris Crispin-Bailey talks about the challenge of Dark Silicon.
Chris
Crispin-Bailey
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"Dark Silicon is a term that was barely heard of only one or two years ago, yet today this is the hot topic that everyone is talking about".
When silicon chips are manufactured, the size of the smallest components, usually transistors, are determined by the metrics known as feature size and line width. Feature size has reduced with every new generation of silicon since the first INTEL integrated circuits of the early 1970's. Currently the feature size of most new chips is in the range 65 to 45 nm, and some chips are starting to use 22nm technology. This has allowed more transistors to be squeezed onto the same chip area, driving Moore's Law, and sustaining the continuing increments in processor performance.
This miniaturisation is set to continue - and we can expect to see 30 times as many CPU cores by 2020 fitting on the same chip area we have today. But there is a serious problem - power density - which cannot scale down at the same pace, means that a core 1/30th of the size will consume 1/8th of the power. It should be clear that this means that power density actually increases by a factor of four. This is bad news for future silicon chips - power converts to heat, and too much heat can destroy a chip in seconds.
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So what are the consequences of High Power density ? First, any chip that exceeds a maximum operating temperature will be rapidly damaged beyond use. However even operating close to a temperature limit can increase the degradation of transistors and wires on the chip - a problem that gets worse as they are increasingly miniaturised. The overall effect is to force the chip with many cores to shut most of these cores down to avoid over-heating, and to move work from core to core to spread the heat across the chip.
"If you can visualise an office building at night with a few lights turned on, and the rest in darkness, you start to see how a chip would look with dark silicon - you can have any light on but not all of them"
A further problem is that we are used to managing average chip temperatures with isolated 'hot-spots' - caused by culprits such as the register-file, reorder buffer, and rename logic used in modern processors. If we increase power density, these hot-spots will reach a failure point long before average die temperature exceeds a manageable limit.
There are of course strategies to try to manage this. Throttling, or in other words dynamically scaling of the clock frequency of the core can reduce power and heat when the cpu has less work to do. The problem with this approach is that the work delivered per watt reduces as clock rates reduce. Another approach is to migrate tasks from one core to another - a kind of 'hot-desking' for CPU cores. When a core is at risk of over-heating we can move the work to another core and let the first one cool off. A third approach, the most radical compared to mainstream thinking, is the approach taken in the University of SanDiego Greendroid project, which replaces frequently executed program sections with hard-coded circuits, filling up the silicon with cool and highly efficient 'helper cores' instead of duplicated cpu's which can never be fully utilised.
"At York we hope to investigate the problem of Dark silicon with novel architectural solutions. We have recently been joined by Antonio Arnone a PhD student under my direction, and we hope we will be reporting more about or work in the future".
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