AMADEUSAMADEUSThe aim of our ubiquitous computing development kit (UDK) is to develop a range of simple (use / construction), cheap development boards to allow investigation of ubiquitous computing systems. These boards can be categorized as either:
This kit is a modular, hardware biased solution to the problem of developing rapid prototypes i.e. the intent is to develop a number of boards with specific functionality which can be easily connected together to achieve the desired overall functionality. To give these boards a kit type feel, all boards use a standard size of 67 mm x 52 mm. For example, consider the scenario of a fridge that is to be integrated into a home network as shown in figure 1.
Figure 1 Fridge system block diagram
This appliance would require a communications link, possibly a bar code reader to log items entered or removed, temperature sensors, data logging to record these actions. Each of these commonly required functions is implemented as a standard board that can be connected together using onboard serial links. Using such a collection of hardware modules, only minimal firmware alterations are required to achieve the desired functionality.
The first version of the ubiquitous computing development kit (UDK_V1) is intended to develop rapid prototypes. This version of the ubiquitous computing development kit (UDK_V2) takes the functionality of each board in UDK_V1 and implements this as hardware IP cores (written in VHDL), allowing a designer to migrate his initial designs into a single or low chip count ASIC / FPGA implementation. A typical development cycle would see the construction of a multi-pcb prototype using UDK_V1 boards. When this initial design and testing phase is complete, the matching IP cores can be combined to form a single VHDL module, performing the same functionality. These IP cores can be loosely categorized as either:
The processor cores can be chosen to suit the desired application, varying from existing free IP cores such as Xilinx's PicoBlaze processor to a more application specific core like the minimal CISC processor (MCP) described later in this document. The peripheral cores contain the key functional units found in the UDK_V1 and others to support the chosen processor. The bus cores are designed to allow easy connection of the processor and its peripherals as well as to external devices via the I2C and SPI bus interfaces. Consider the previous scenario of a fridge that is to be integrated into a home network, this can now be implemented in a single FPGA as shown in figure 2.
Figure 2 Example FPGA system block diagram
©2003 Dept. of Computer Science, The University of York.