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Researcher Profile: Jack Whitham

Time-predictable Computer Architectures

My research involves finding ways to achieve both speed and predictability within a computer system.

About my research

I work within the Real-time Systems (RTS) research group, looking at computer architectures for embedded and real-time systems. These involve computer hardware and software that balance the requirements of embedded systems (typically small, fast and energy-efficient) and the requirements of real-time systems, (which must be extremely predictable).

In a real-time system, timing is everything. Each program has a deadline, and all of its work must be completed before that deadline. This is a very special criteria for design. Most computer software and hardware is built only for speed, not predictability, and this is why a typical PC application sometimes takes longer to respond than the user expects! The computers within cars, aeroplanes, industrial machines and network infrastructure cannot behave in that way, because a delayed response could be disastrous.

Researchers at York and other institutions have created mathematical models to describe real-time software and ensure that such delayed responses, which are technically known as "deadline misses", can never occur in a particular system. These models have grown more and more sophisticated during the past two decades, and York's RTS Group has had a major influence on the state of the art. However, the theories do not apply so well to modern computers because the hardware itself has ceased to be predictable. The operation of each program on a PC is now affected by so many factors arising from hardware and software that accurate models cannot be created. For predictability, older and slower computer hardware must be used. Applications have to be simple and developed using older techniques.

Time-predictable Computer Architectures

My research involves finding ways to achieve both speed and predictability within a computer system. An ideal "time-predictable computer architecture" is fast and predictable. It is able to run complex applications developed with state-of-the-art technologies such as Real-time Java. Analytical techniques can ensure that these applications always meet their deadlines.

Currently, I am working on a project to create a new sort of memory controller. Modern computers use a hierarchy of memory (Figure 1), and much of the timing uncertainty arises because data is transferred between the levels of that hierarchy "on demand". Performance is usually good, but there are cases where it is very, very poor. The speed of each program is dependent on the current location of the data it needs, and that depends on the earlier activities of other programs! There are "worst case scenarios" where deadline misses could occur.

Figure 1. Ideally, all computer memory would be very fast and cheap, but this isn't physically possible. Therefore, a hierarchy is formed, and in a conventional computer architecture, data is relocated between the levels of the hierarchy on demand. On average, this makes good use of the faster but smaller and more expensive memories.

I aim to design architectures where the worst case scenario is almost as good as the best case scenario. To achieve this whenever predictability is important, a program needs to be able to take full control of the movement of data, moving it to the upper levels when required. That way, every access to data can be fast and predictable (Figure 2). I am extending earlier work on technical topics such as "cache locking" and "scratchpad memory" in order to do this. The centrepiece of my work, the "scratchpad memory management unit" (SMMU), has already formed the basis of a number of research papers. Investigation will go forward as part of TEMPO, the real-time embedded systems research project funded by the EPSRC and managed by Dr Neil Audsley.

Figure 2. A time-predictable system retains the same memory hierarchy, but allows data to be moved explicitly rather than on-demand.

Want to know more?

Visit Jack Whitham's personal page or our Real-time Systems research group web page.

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